IRF7413A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
?
Circuit Layout Considerations
? Low Stray Inductance
? Ground Plane
? Low Leakage Inductance
Current Transformer
-
+
?
-
-
?
+
?
R G
Driver Gate Drive
P.W.
?
?
?
?
Period
dv/dt controlled by R G
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
D=
Period
+
-
V DD
Reverse
D.U.T. I SD Waveform
V GS =10V
*
Recovery
Body Diode Forward
Current
Current
di/dt
D.U.T. V DS Waveform
Diode Recovery
Re-Applied
dv/dt
V DD
Voltage
Inductor Curent
Body Diode
Ripple ≤ 5%
Forward Drop
I SD
* V GS = 5V for Logic Level Devices
Fig 13. For N-Channel HEXFETS
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